`timescale 1 ps/ 1 ps

module top (
  PIN_HSE,
  PIN_HSI,
  PIN_OSC
);
input PIN_HSE;
input PIN_HSI;
input PIN_OSC;

// Location: PIN_HSE
alta_rio PIN_HSE_iobuf (
    .datain   (1'b0),
    .oe       (1'b0),
    .outclk   (1'b0),
    .outclkena(1'b0),
    .inclk    (1'b0),
    .inclkena (1'b0),
    .areset   (1'b0),
    .sreset   (1'b0),
    .combout  (PIN_HSE_in),
    .regout   (),
    .padio    (PIN_HSE)); // HSE clock

// Location: PIN_HSI
alta_rio PIN_HSI_iobuf (
    .datain   (1'b0),
    .oe       (1'b0),
    .outclk   (1'b0),
    .outclkena(1'b0),
    .inclk    (1'b0),
    .inclkena (1'b0),
    .areset   (1'b0),
    .sreset   (1'b0),
    .combout  (PIN_HSI_in),
    .regout   (),
    .padio    (PIN_HSI)); // HSI clock

// Location: PIN_OSC
alta_rio PIN_OSC_iobuf (
    .datain   (1'b0),
    .oe       (1'b0),
    .outclk   (1'b0),
    .outclkena(1'b0),
    .inclk    (1'b0),
    .inclkena (1'b0),
    .areset   (1'b0),
    .sreset   (1'b0),
    .combout  (PIN_OSC_in),
    .regout   (),
    .padio    (PIN_OSC)); // OSC clock

wire [4:0] PLL_CLKOUT;
wire       sys_resetn;
wire       sys_ctrl_stop;
wire [1:0] sys_ctrl_clkSource;
wire       PLL_ENABLE;
wire       PLL_LOCK;

alta_pllve pll_inst (
  .clkin(PIN_HSE_in),
  .pfden(1'b1),
  .resetn(PLL_ENABLE),
  .phasecounterselect(3'b0),
  .phaseupdown(1'b0),
  .phasestep(1'b0),
  .scanclk(1'b0),
  .scanclkena(1'b0),
  .scandata(1'b0),
  .configupdate(1'b0),
  .clkfb(pll_clkfb),
  .clkfbout(pll_clkfb),
  .clkout0(PLL_CLKOUT[0]),
  .clkout1(PLL_CLKOUT[1]),
  .clkout2(PLL_CLKOUT[2]),
  .clkout3(PLL_CLKOUT[3]),
  .clkout4(PLL_CLKOUT[4]),
  .lock   (PLL_LOCK));
defparam pll_inst.CLKIN_FREQ      = "12.0";
defparam pll_inst.CLKIN_HIGH      = 8'd0;
defparam pll_inst.CLKIN_LOW       = 8'd1;
defparam pll_inst.CLKIN_TRIM      = 1'b1;
defparam pll_inst.CLKIN_BYPASS    = 1'b0;
defparam pll_inst.CLKFB_HIGH      = 8'd59;
defparam pll_inst.CLKFB_LOW       = 8'd59;
defparam pll_inst.CLKFB_TRIM      = 1'b0;
defparam pll_inst.CLKFB_BYPASS    = 1'b0;
defparam pll_inst.CLKDIV0_EN      = 1'b1;
defparam pll_inst.CLKDIV1_EN      = 1'b1;
defparam pll_inst.CLKDIV2_EN      = 1'b0;
defparam pll_inst.CLKDIV3_EN      = 1'b0;
defparam pll_inst.CLKDIV4_EN      = 1'b0;
defparam pll_inst.CLKDIV4_EN      = 1'b0;
defparam pll_inst.CLKOUT0_HIGH    = 8'd0;
defparam pll_inst.CLKOUT0_LOW     = 8'd1;
defparam pll_inst.CLKOUT0_TRIM    = 1'b1;
defparam pll_inst.CLKOUT0_BYPASS  = 1'b0;
defparam pll_inst.CLKOUT0_DEL     = 8'd0;
defparam pll_inst.CLKOUT0_PHASE   = 3'd0;
defparam pll_inst.CLKOUT1_HIGH    = 8'd3;
defparam pll_inst.CLKOUT1_LOW     = 8'd3;
defparam pll_inst.CLKOUT1_TRIM    = 1'b0;
defparam pll_inst.CLKOUT1_BYPASS  = 1'b0;
defparam pll_inst.CLKOUT1_DEL     = 8'd0;
defparam pll_inst.CLKOUT1_PHASE   = 3'd0;
defparam pll_inst.CLKOUT2_HIGH    = 8'd255;
defparam pll_inst.CLKOUT2_LOW     = 8'd255;
defparam pll_inst.CLKOUT2_TRIM    = 1'b0;
defparam pll_inst.CLKOUT2_BYPASS  = 1'b0;
defparam pll_inst.CLKOUT2_DEL     = 8'd0;
defparam pll_inst.CLKOUT2_PHASE   = 3'd0;
defparam pll_inst.CLKOUT3_HIGH    = 8'd255;
defparam pll_inst.CLKOUT3_LOW     = 8'd255;
defparam pll_inst.CLKOUT3_TRIM    = 1'b0;
defparam pll_inst.CLKOUT3_BYPASS  = 1'b0;
defparam pll_inst.CLKOUT3_DEL     = 8'd0;
defparam pll_inst.CLKOUT3_PHASE   = 3'd0;
defparam pll_inst.CLKOUT4_HIGH    = 8'd255;
defparam pll_inst.CLKOUT4_LOW     = 8'd255;
defparam pll_inst.CLKOUT4_TRIM    = 1'b0;
defparam pll_inst.CLKOUT4_BYPASS  = 1'b0;
defparam pll_inst.CLKOUT4_DEL     = 8'd0;
defparam pll_inst.CLKOUT4_PHASE   = 3'd0;
defparam pll_inst.FEEDBACK_MODE   = 3'b100;
defparam pll_inst.FBDELAY_VAL     = 3'b100;
defparam pll_inst.VCO_POST_DIV    = 1'b1;

assign usb0_xcvr_clk = PLL_CLKOUT[1];

wire sys_gck;
assign bus_clk = sys_gck;

// Location: BBOX_X22_Y4_N0 FIXED_COORD
alta_gclksw gclksw_inst (
    .resetn(sys_resetn),
    .ena   (!sys_ctrl_stop),
    .clkin0(PIN_HSI_in),
    .clkin1(PIN_HSE_in),
    .clkin2(PLL_CLKOUT[0]),
    .clkin3(),
    .select(sys_ctrl_clkSource),
    .clkout(sys_clk));

alta_gclkgen gclksw_gen (
    .clkin (sys_clk),
    .ena   (!sys_ctrl_stop),
    .clkout(sys_gck0));

// Location: CLKCTRL_G5 FIXED_COORD
alta_io_gclk gclksw_gclk (
    .inclk (sys_gck0),
    .outclk(sys_gck));

wire [1:0]  mem_ahb_htrans;
wire        mem_ahb_hready;
wire        mem_ahb_hwrite;
wire [31:0] mem_ahb_haddr;
wire [2:0]  mem_ahb_hsize;
wire [2:0]  mem_ahb_hburst;
wire [31:0] mem_ahb_hwdata;
wire        mem_ahb_hreadyout;
wire        mem_ahb_hresp;
wire [31:0] mem_ahb_hrdata;

wire        slave_ahb_hsel;
wire        slave_ahb_hready;
wire        slave_ahb_hreadyout;
wire [1:0]  slave_ahb_htrans;
wire [2:0]  slave_ahb_hsize;
wire [2:0]  slave_ahb_hburst;
wire        slave_ahb_hwrite;
wire [31:0] slave_ahb_haddr;
wire [31:0] slave_ahb_hwdata;
wire        slave_ahb_hresp;
wire [31:0] slave_ahb_hrdata;

wire [3:0]  ext_dma_DMACBREQ;
wire [3:0]  ext_dma_DMACLBREQ;
wire [3:0]  ext_dma_DMACSREQ;
wire [3:0]  ext_dma_DMACLSREQ;
wire [3:0]  ext_dma_DMACCLR;
wire [3:0]  ext_dma_DMACTC;
wire [3:0]  local_int;

assign mem_ahb_hreadyout = 1'b1;
assign mem_ahb_hresp     = 1'b0;
assign mem_ahb_hrdata    = 32'b0;

assign slave_ahb_hsel   = 1'b0;
assign slave_ahb_hready = 1'b1;
assign slave_ahb_htrans = 2'b0;
assign slave_ahb_hsize  = 3'b0;
assign slave_ahb_hburst = 3'b0;
assign slave_ahb_hwrite = 1'b0;
assign slave_ahb_haddr  = 32'b0;
assign slave_ahb_hwdata = 32'b0;

assign ext_dma_DMACBREQ  = 4'b0;
assign ext_dma_DMACLBREQ = 4'b0;
assign ext_dma_DMACSREQ  = 4'b0;
assign ext_dma_DMACLSREQ = 4'b0;
assign local_int         = 4'b0;

wire [7:0] gpio0_io_out_data;
wire [7:0] gpio0_io_out_en;
wire [7:0] gpio0_io_in = {1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0};

wire [7:0] gpio1_io_out_data;
wire [7:0] gpio1_io_out_en;
wire [7:0] gpio1_io_in = {1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0};

wire [7:0] gpio2_io_out_data;
wire [7:0] gpio2_io_out_en;
wire [7:0] gpio2_io_in = {1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0};

wire [7:0] gpio3_io_out_data;
wire [7:0] gpio3_io_out_en;
wire [7:0] gpio3_io_in = {1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0};

wire [7:0] gpio4_io_out_data;
wire [7:0] gpio4_io_out_en;
wire [7:0] gpio4_io_in = {1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0};

wire [7:0] gpio5_io_out_data;
wire [7:0] gpio5_io_out_en;
wire [7:0] gpio5_io_in = {1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0};

wire [7:0] gpio6_io_out_data;
wire [7:0] gpio6_io_out_en;
wire [7:0] gpio6_io_in = {1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0};

wire [7:0] gpio7_io_out_data;
wire [7:0] gpio7_io_out_en;
wire [7:0] gpio7_io_in = {1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0};

wire [7:0] gpio8_io_out_data;
wire [7:0] gpio8_io_out_en;
wire [7:0] gpio8_io_in = {1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0};

wire [7:0] gpio9_io_out_data;
wire [7:0] gpio9_io_out_en;
wire [7:0] gpio9_io_in = {1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0};

alta_rv32 rv32(
  .sys_clk            (sys_clk                                         ),
  .sys_ctrl_stop      (sys_ctrl_stop                                   ),
  .sys_ctrl_clkSource (sys_ctrl_clkSource                              ),
  .resetn_out         (sys_resetn                                      ),
  .sys_ctrl_pllEnable (PLL_ENABLE                                      ),
  .sys_ctrl_pllReady  (PLL_LOCK                                        ),
  .ext_resetn         (1'b1                                            ),
  .test_mode          (2'b0                                            ),
  .usb0_xcvr_clk      (usb0_xcvr_clk                                   ),
  .usb0_id            (1'b1                                            ),
  .ext_int            ({1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0}),
  .mem_ahb_htrans     (mem_ahb_htrans                                  ),
  .mem_ahb_hready     (mem_ahb_hready                                  ),
  .mem_ahb_hwrite     (mem_ahb_hwrite                                  ),
  .mem_ahb_haddr      (mem_ahb_haddr                                   ),
  .mem_ahb_hsize      (mem_ahb_hsize                                   ),
  .mem_ahb_hburst     (mem_ahb_hburst                                  ),
  .mem_ahb_hwdata     (mem_ahb_hwdata                                  ),
  .mem_ahb_hreadyout  (mem_ahb_hreadyout                               ),
  .mem_ahb_hresp      (mem_ahb_hresp                                   ),
  .mem_ahb_hrdata     (mem_ahb_hrdata                                  ),
  .slave_ahb_hsel     (slave_ahb_hsel                                  ),
  .slave_ahb_hready   (slave_ahb_hready                                ),
  .slave_ahb_hreadyout(slave_ahb_hreadyout                             ),
  .slave_ahb_htrans   (slave_ahb_htrans                                ),
  .slave_ahb_hsize    (slave_ahb_hsize                                 ),
  .slave_ahb_hburst   (slave_ahb_hburst                                ),
  .slave_ahb_hwrite   (slave_ahb_hwrite                                ),
  .slave_ahb_haddr    (slave_ahb_haddr                                 ),
  .slave_ahb_hwdata   (slave_ahb_hwdata                                ),
  .slave_ahb_hresp    (slave_ahb_hresp                                 ),
  .slave_ahb_hrdata   (slave_ahb_hrdata                                ),
  .ext_dma_DMACBREQ   (ext_dma_DMACBREQ                                ),
  .ext_dma_DMACLBREQ  (ext_dma_DMACLBREQ                               ),
  .ext_dma_DMACSREQ   (ext_dma_DMACSREQ                                ),
  .ext_dma_DMACLSREQ  (ext_dma_DMACLSREQ                               ),
  .ext_dma_DMACCLR    (ext_dma_DMACCLR                                 ),
  .ext_dma_DMACTC     (ext_dma_DMACTC                                  ),
  .local_int          (local_int                                       ),
  .gpio0_io_in        (gpio0_io_in                                     ),
  .gpio0_io_out_data  (gpio0_io_out_data                               ),
  .gpio0_io_out_en    (gpio0_io_out_en                                 ),
  .gpio1_io_in        (gpio1_io_in                                     ),
  .gpio1_io_out_data  (gpio1_io_out_data                               ),
  .gpio1_io_out_en    (gpio1_io_out_en                                 ),
  .gpio2_io_in        (gpio2_io_in                                     ),
  .gpio2_io_out_data  (gpio2_io_out_data                               ),
  .gpio2_io_out_en    (gpio2_io_out_en                                 ),
  .gpio3_io_in        (gpio3_io_in                                     ),
  .gpio3_io_out_data  (gpio3_io_out_data                               ),
  .gpio3_io_out_en    (gpio3_io_out_en                                 ),
  .gpio4_io_in        (gpio4_io_in                                     ),
  .gpio4_io_out_data  (gpio4_io_out_data                               ),
  .gpio4_io_out_en    (gpio4_io_out_en                                 ),
  .gpio5_io_in        (gpio5_io_in                                     ),
  .gpio5_io_out_data  (gpio5_io_out_data                               ),
  .gpio5_io_out_en    (gpio5_io_out_en                                 ),
  .gpio6_io_in        (gpio6_io_in                                     ),
  .gpio6_io_out_data  (gpio6_io_out_data                               ),
  .gpio6_io_out_en    (gpio6_io_out_en                                 ),
  .gpio7_io_in        (gpio7_io_in                                     ),
  .gpio7_io_out_data  (gpio7_io_out_data                               ),
  .gpio7_io_out_en    (gpio7_io_out_en                                 ),
  .gpio8_io_in        (gpio8_io_in                                     ),
  .gpio8_io_out_data  (gpio8_io_out_data                               ),
  .gpio8_io_out_en    (gpio8_io_out_en                                 ),
  .gpio9_io_in        (gpio9_io_in                                     ),
  .gpio9_io_out_data  (gpio9_io_out_data                               ),
  .gpio9_io_out_en    (gpio9_io_out_en                                 )
);

endmodule

